The BCC 500 timesharing system

When Project Genie successfully produced the Berkeley Timesharing System in the mid 1960s, many of the people formed the Berkeley Computer Corporation and set out to make an even more powerful timesharing system with a goal to support 500 active users. The company did make a working prototype, the BCC 500, but then ran out of funding and had to close shop. The computer was sold to University of Hawaii in 1971. After extensive refurbishment it went online in 1973. It became an Arpanet node, and was the hub for the Aloha wireless network that inspired Ethernet. The computer was shut down in 1980.

Al Kossow recently posted a tape image from 1979 that seems to have all key component of the system, including many binary and source files. I have extracted all files and converted them to readable text format.


The system organization is unusual, because there are six asymmetric processors with a shared memory. Four of them manage system tasks, and two are for running user code. The processors are microprogrammed, and some of the system is written in microcode. The microcode also implements two instruction sets. The native instruction set is geared towards running SPL code, which is a high level Algol-like language. There is also a subset of the 940 instruction set for running programs from the Berkeley TSS.


There are also many other programming languages available: QSPL for the 940, LISP, BASIC, SNOBOL, CAL (similar to JOSS), and various assemblers. There is a cross development suite for the 8080, since it was used in the remote units across the Aloha network.

Very nice! The first half dozen pages of Butler Lampson’s Some Remarks are a nice overview

Here is a picture of one of the ROM cards- discrete diodes. There are bunch more photos in the CHM collection’s website:

Thank you. There is a microcode assembler on the tape (both binary and source), so I’d like to assemble the microcode from source code. It would be good to compare against those ROM boards.

Al Kossow also has a few photos: Index of /pdf/univOfHawaii/Aloha_BCC-500/pictures

I’m working on a SIMH based emulator for running the microcode. This is a block diagram of the internal processor architecture.