(I was all set to collate a few links of the words of Gordon Bell, but this first paper has so much that’s good it feels like it needs a thread of its own.)
What Have We Learned From the PDP-11 (32 page pdf, 1977)
In the six years that the PDP-11 has been on the market, more than 20,000 units in 10 different models have been sold. Although one of the original system design goals was a broad range of models, the actual range of 500 to 1 (in cost and memory size) has exceeded the design goals.
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The PDP-11 was not extremely well planned or controlled; rather it evolved under pressure from implementation and marketing groups.
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An earlier paper [Bell et al. 1970] described the design goals and constraints for the PDP-11, beginning with a discussion of the weaknesses frequently found in minicomputers. The designers of the PDP-11 faced each of these known minicomputer weaknesses, and our goals included a solution to each one.
Here’s my summary of these weaknesses and goals:
- limited address space
- too few registers
- lack of hardware stack(s)
- limited interrupts and slow context switches
- inadequate character handling
- inability to put code in ROM (self-modifying code a necessity)
- lack of a range of compatible machines with a spread of performance
- high cost of programming
- not supporting 8 bit characters
We do not have a very good understanding of the style of programming our users have adopted. Since the machine can be used so many ways, there have been many programming styles. Former PDP-8 users adopt a one-accumulator convention; novices use the two-address form; some compilers use it as a stack machine; probably most of the time it is used as a memory-to-register machine with a stack for procedure calling.
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When an improved basic technology becomes available to a computer designer, there are three paths he can take to incorporate that technology in a design: use the newer technology to build a cheaper system with the same performance, hold the price constant and use the technological improvement to get a slight increase in performance, or push the design to price.
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The design of the PDP-11 series began in 1969 with the Model 20. Subsequently, three models were introduced as minimum-cost, best cost/performance, and maximum-performance machines. The memory technology of 1969 imposed several constraints.
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These constraints established four design attitudes toward the PDP-11’s architecture. First, it should be asynchronous, and thereby capable of accepting different configurations of memory that operate at different speeds. Second, it should be expandable to take eventual advantage of a larger number of registers, both user registers for new data types and internal registers for improved context switching, memory mapping and protected multiprogramming. Third, it could be relatively complex, so that a microcode approach could eventually be used to advantage: new data types could be added to the instruction set to increase performance, even though they might add complexity. Fourth, the UNIBUS width should be relatively large, to get as much performance as possible, since the amount of computation possible per memory cycle is relatively small.
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Any design project, whether for computers or washing machines, is shaped by the skill, style, and habit of its designers… A barely minimal computer… can be built trivially. From this minimal point, performance increases. Eventually the size increases and the design becomes unbuildable or nearly unprogrammable, and therefore not marketable. The designer’s job is to find a point on the cost/performance curve representing a reasonable and marketable design, and produce the machine corresponding to that point.
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We can see the results of second-systemitis in the history of the PDP-8 implementation designs: alternate designs were bigger, then cheaper. The big designs solved the performance problems of the smaller ones; then the smaller ones solved the cost problems of the bigger ones.
The problems faced by computer designers can usually be attributed to one of two causes: inexperience or second-systemitis
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The internal organization of DEC design groups has through the years oscillated between market orientation and product orientation. Since the company has been growing at a rate of 30 to 40% a year, there has been a constant need for reorganization. At any given time, one third of the staff has been with the company less than a year.
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The PDP-8 group was a close-knit group who did not communicate very much with the rest of the company. They had a fair understanding of architecture, and were oriented toward producing minimal-cost designs with an occasional high-performance model.
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As part of the design cycle, it was necessary to ensure that the design could achieve a wide cost/performance range. The only safe way to design a range is to simultaneously do both the high- and low-end designs. The 11 /40 design was started right after the 11/20, although it was the last to come on the market. The low and high ends had higher priority to get into production, as they extended the market.
Here’s a diagram from the paper:
The people who ultimately formed the 11/45 group had started by proposing a PDP-11-like 18-bit machine with roots in the PDP-15. Later a totally different design was proposed, with roots in the LINC group, that was instruction subset-compatible at the source program level. As the groups considered the impact of their changes on software needs, they rapidly joined the mainstream of the PDP-11 design.
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Amdahl’s rule of thumb for IBM computers is that 1 byte of memory and 1 byte/sec of 1/0 are required for each instruction/sec. For DEC applications, with emphasis in the scientific and control applications, there is more computation required per memory word. Further, the PDP-11 instruction sets do not contain the complex instructions typical of IBM computers, so a larger number of instructions will be executed to accomplish the same task. Hence, we assume 1 byte of memory for each 2 instructions/sec, and that 1 byte/sec of 1/0 occurs for each instruction/sec.
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The PDP-11 was originally conceived as a small machine, but over time its range was gradually extended so that there is now a factor of 500 in price ($500 to $250,000) and memory size (8K bytes to 4 megabytes) between the smallest and largest models. This range compares favorably with the range of the 360 family (4Kbytes to 4 megabytes). Needless to say, a number of problems have arisen as the basic design was extended.
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Although it is not surprising that multiprocessors have not been used save in highly specialized applications, it is depressing.
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One reason that there is not a lot of demand for multiprocessors is acceptance of the philosophy that we can always build a better single-processor system.
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There exist numerous operating systems for the PDP-11. One of the reasons for this situation is that there is no easy way to compare an existing system with a design for a new one. Instead, an engineering-marketing conspiracy invents a new system because it is oriented toward a particular market in some nebulous way.
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In this paper we have reexamined the PDP-11 in the light of six years of experience, and have compared its successes and failures with the goals and problems of the initial ideas. With the clarity of hindsight, we now see the initial design problems. Many mistakes were made through ignorance, and many more because the design work was started too late. As we continue to evolve and improve the PDP-11 computer over the next five years, it will indeed be interesting to observe whether the PDP-11 can continue to be a significant, cost-effective minicomputer. We believe it can. The ultimate test is its use.
I suspect this paper leads us naturally to the VAX, introduced the same year. Is it the case that a VAX appears, to a seasoned PDP-11 user, as a kind of super PDP-11?