Software bit-banging the Q line to the cassette at 300 baud. This gates a 555 derived 3KHZ/1.5KHZ Kansas City sort-of Standard to the mic via amplifier/filter. I use a variant of Steve Ciarcia’s “Build your own Z80” circuit to demodulate the playback signal, then software UART receive when using my own routines, or a 74HC based logic UART receiver for my auto-boot loader to the DMA circuit (I flip the red CASS/Key toggle switch to ‘CASS’ that 2-to-1 multiplexes the received data into the INP4 port and select ‘load’ mode as usual). I have a counter that parallel loads an 8-bit latch on the receipt of the stop bit, and also hits the “in” switch to initiate the DMA read. Quite reliable at 300 baud.
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Jeff - this reminds me of a book and radio documentary series that Douglas Adams made in 1989 called “Last Chance to See”.
He travelled the world - and sought out rare, endangered species on the brink of extinction - before it was too late.
Sadly he died in May 2001.
It’s the same with 74xx logic - so many devices that you could purchase 20 years ago are now… extinct.
So my bit serial computer is a last opportunity to do something in DIL 74HCxx chips - before they are obsoleted.
Already, some of the “best” chips are no longer stocked, gone the way of the dinosaurs.
So I keep a list of what is still available from mainstream suppliers - and try not to design with obsolete or no longer manufactured devices.
So ROM and RAM presents a challenge. How do you remain “retro-friendly” and then stick in a modern memory device that is massive compared to what was available 30 years ago?
Most small PROMs are obsolete. The smallest equivalent is a AT28C64 which is 8K x 8 in a 28 pin DIL.
Well - the ZX81 (1981) had an 8K x 8 OTP ROM - so the AT28C64 is a modern equivalent.
The ZX Spectrum (1982) had 16K or 48K RAM internally - so a current 64K x 8 or 128K x 8 is a legitimate candidate.
|All of my bit-serial designs are named after arachnids (8-legs) - MITE, TICK, SPIDER, SCORPION. Don’t get me started on cephalopods…
SPIDER has a 16-bit wordsize, SCORPION is a place holder for a 32-bit design.
MITE and TICK explore the 8-bit arena.
The overheads of a bit serial architecture mean that 4-bit is not really viable - early electronic calculator fans will dispute this.
You can still buy a 74HC4517 which is a dual 64-bit shift register - tapped every 16-bits - a good candidate for SPIDER and SCORPION
I will put 128K x 8 parts on the board.
Alliance are the main supplier - under $4 for the AS6C1008-55PCN
https://www.mouser.co.uk/ProductDetail/Alliance-Memory/AS6C1008-55PCN
https://www.digikey.co.uk/en/products/detail/alliance-memory-inc/AS6C1008-55PCN/4234576
If you want to be a tiny bit more retro, you can still get 8k x 8 RAMs from Alliance. In slightly more convenient 28-pin through-hole packages.
https://www.digikey.co.uk/en/products/detail/alliance-memory-inc/AS6C6264-55PCN/4234595
I will put down a 32 pin footprint - with jumper links for the 8K x 8 option. The 128K x 8 is actually cheaper!!
Tonight looking at the rest of the RCA1802 reverse engineered logic schematic.
I think a 74HC299 8-bit tristate, universal (left and right) shift register would be a good candidate for the Accumulator.
I run a small FB group for Bit Serial Computing and a slightly larger one for Minimalist Computing.
Redirecting... with 64 members
Redirecting... with 14772 members
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Jeff - I made a start transcribing Joseph A Weisbecker’s “FRED” TTL prototype (1970/71) to “Digital”.
It’s not fully debugged - but it is in my github repo “JAWS” Joseph A. Weisbecker’s Stuff!
Have fun!
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Today I transcribed AmyK’s comments about the functions of different parts of the chip die on top of the most excellent die photo from the Visual6502.org folks. Please let me know about inaccuracies on this forum.
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Jeff,
Good work.
It might be worth putting an extra box just around the ALU - highlighting just how small it is.
Here’s a Wayback Machine capture:
There’s also a capture of the linked analysis of the 1802 datapath (“David Schultz’s analysis of the layout and circuits”):
Thanks EdS - this is most useful,
It’s good that at least some of these unique reverse engineering project notes are recorded - somewhere.
Despite my (marginally under 60) age, I somehow missed out on VLSI design at college. Perhaps my Uni was just not progressive enough. We did PALs and GALs as a 3 month Final term of Final Year Course - but that was about it.
I am amazed at these people who can look at a photomicrograph - and chart out the transistors, the gates and the interconnectivity.
I must also have been asleep or hungover for the HDL course - something to learn in my retirement,
By then we will be asking Chat GPT to design and provide verilog source code of a CPU in the style of a 6502 or 1802…
I guess I am most comfortable with the “oldskool” 2.54mm pitch TTL" at least I can see the pins to solder them!
I found the hand drawn schematics of the “FRED” machine by Joseph Weisbecker, and have transcribed them into “TTL” using H. Neeman’s “Digital” Simulator. (Such a bad name for such a useful tool - but that’s another discussion).
The guts of an RCA1802 is about 60 modern 74HC00 devices (mostly glue logic and 4-bit/8-bit registers and a couple of small SRAMs).
When I get it working and fully debugged, it will have the benefit of being able to execute the huge back-catalog of RCA1802 code.
Whilst my initial thoughts were inspired by the PDP-8/S - this week’s introduction of a batch of modern EDUC-8 pcbs and kits - has suggested that the world probably has enough 8-bit cut-down PDP-8/S machines for the moment and the RCA1802 will be a lot more fun.
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CMOS Pals programmed as simple logic, may give you the best of both worlds
for any messy logic or lay out problems. Check timing delays and setup times
with the orginal TTL. Modern logic tends to be too slow or too fast.
Good luck with your project, this tape will self distruct in …
@pdxjjb: Those two, well-labeled areas in the lower left of the 1802, as useful as they might be for reverse engineering, are most likely intended as test structures. The fab QC staff would probe them to see how well the manufacturing run went by measuring the behavior of the transistors therein. You can see that the P- and N- halves of the CMOS process are separated so they can be tested independently.
Jeff,
Over the weekend, I revisited the schematics of the TTL “FRED” machine, the early prototype of the RCA1802 - and I have most of it working in the “Digital” simulator.
Still a work in progress - but getting closer to a working design
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Nice set up.
I have a 1802 SBC from a Japanese vendor, but unfortunately the 1802 is not yet showing any signs of life.
So it’s currently resting in a drawer.
Jeff - as an update,
I have the “FRED” logic into “Digital” now and the simulation speed is about 8500 instructions per second at 16 clocks per instruction - so maximum clock is about 136kHz.
The 16 clock cycle makes it easy to incorporate the bit-serial ALU.
Whilst this week we have seen the EDUC-8 make a 50 year anniversary resurrection - I don’t think that an entirely bit-serial 1802 workalike has been done.
This would be neat because of the massive back catalogue of 1802 code.
I will keep you posted.
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Japanese? Hmm, could you take a picture of it and post. I thought 1802 had its big influence outside of US in northern Europe countries.
The website is here: Use Google to translate from Japanese
Interesting. I wasn’t aware of a serial version of the pdp8. I have however used the register transfer modules (aka PDP16) and those boards with their evoke/branch/merge signals etc might be a good model to follow for designing a self-timed bit-serial processor. Come to think of it, didn’t Steve Furber develop a version of the ARM in that style at Manchester?
Nice tidy package, Thanks. I was presuming this to be an earlier, late 70’s or early '80s board, hence my interest for historical reasons.