Has anyone seen a breakdown of what each z80 instruction is doing during each M/T cycle? When learning a new instruction set architecture, I think it’s easier to validate instruction lengths than speeds. So this information is useful to make sure one does not get into bad optimization habits!
For example, if I am telling you about an instruction and claim it is 3 bytes long, and also say there is a mandatory 16-bit immediate operand, then that makes sense. One byte for opcode and two bytes for the operand. If I claim it is smaller or larger than 3 bytes, you gotta wonder what’s going on with the extra or missing bytes.
But claims about speeds are harder to prove. A lot more knowledge of the processor is necessary. Sure there is info out there, but lone numbers with no explanation have to be taken on faith. For this reason, I think it’s useful to know what an instruction is doing during each cycle, even if that is invisible to the programmer. The 65c816 datasheet for example includes Table 5-7 which describes this. Has anyone seen a similar table for the Zilog Z80?
When my copy arrives I’m sure that will help. I haven’t seen any eratta for that textbook so maybe it is about as close to perfect as it is ever going to be.
Perhaps a test ROM connected to a RTC to time each opcode would be the best way to tell instruction speed, but that wouldn’t reveal anything about what is going on during individual T-states. I doubt it would be too difficult to have a loop generate all the opcodes wrapped in timer start/timer end code.
Another good place to start research is the thread on stardot about the Z80 protocol decoder, a software project which decodes Z80 bus traffic and necessarily models a lot of cycle by cycle behaviour.
But yes, Zaks’ book, and perhaps alternatively Leventhal’s book, should be a good start. You can find a bibliography and some links to PDFs at Z80 Reference Literature
I’ve spent almost a year meticulously recreating the timing of each instruction. If it helps, you could look at the timing table in the spreadsheet here: A-Z80 Timings
It is exact for the behavior of all pins and internal machine states. You can email me if you find it useful and have more questions about it.
Perhaps to simplify the hardware they just decided to make all instructions take a nice, round multiple of 4 T-states and spend the extra time doing nothing instead of trying to complete some M-states early like the full Z80 does.