I have written a model of a Z80 computer system in Verilog and implemented it on an FPGA development board (a Terasic DE10). It features a Z80 CPU, 64K of RAM, a UART, and a timer. I also wrote a ROM monitor program for it that is loosely based on the Xerox 820/Bigboard monitor. It has been a fun project and a great way to learn more about the Z80 CPU architecture.
Here’s a picture of the DE10 FPGA development board:
And Here’s a picture of it running Conway’s Game of Life: