Very interesting read - much more to the story than Iād realised.
Very surprised to see Elbrus is still alive, inside Intel:
A couple of Register articles (2004-5) contain this chart showing collapsing forecasts - always a ski-ramp!
Never used Itanium (which in itself is a data point), but the only anecdata I can offer is that I knew people in a software company (ActiveState) which maintains a lot of open source software for Microsoft platforms, and through their Microsoft partnership they got hold of some Itanium boxes in the early 2000s, and they told that while the compilers (C, because open source software) were of dubious quality, the heat output of the boxes was excellent. Which is I guess a plus in Canada.
Hee hee - I couldnāt have recalled the name ActiveState, but now you mention it, I think I used to make use of their Python port.
On the Itanic/Itanium front, I came across a couple more pieces:
[print version] Itanium: A cautionary tale (2005, archive version, from CNET News.com)
Also
Intel Pulls the Plug on Itanium (Possibly the Worldās Most Expensive Failed Chip Project) from EE Journal
By 2008, just seven years after Itaniumās debut, it was already in deep trouble. HP was secretly making reverse ransom payments to Intel to convince the latter company to keep Itanium on the development roadmap. A princely $440 million (thatās $88 million/year, or $241,000 per day) changed hands over five years in an effort to keep Itanium alive through 2014. The two companies then re-upped their Faustian bargain, for an additional $250 million, to extend Itaniumās life support through 2017 ā i.e., until this year. Hence, the subdued Intel announcement that the new crop of Itanium chips will also be the last.
Oh yeah, HP. Another victim of the Itanium phantom, probaby at least partly trying to keep their own PA RISC product lines afloat.
Timeline for reference:
- DEC bought by CPQ 1998
- CPQ selling Alpha IP to Intel 2001
- CPQ bought by HP 2002
- (after this HP quickly killing pretty much all remaining DEC technology)
In Cixin Liuās āThe Three-Body Problemā (2006) ā I havenāt seen the
recent Netflix adaptation, but Iāve read the English translation and
watched the Tencent Chinese TV adaptation on YouTube ā
Wei Cheng, the savant math prodigy who spends every waking
minute obsessing over the three-body (physics) problem, has
his own high-end computer at home (obtained by his wife
Shen Yufei, who is on the side of the alien Trisolarans).
++++
p. 81:
In the living room, Wang saw Wei Cheng, Shenās husband. Wei was
about forty years old and had the look of a staid, honest intellectual.
Wang knew little about him other than his name. Shen hadnāt said
much when she introduced him. He didnāt seem to have a job, since
he stayed home all day. He never showed any interest in the Frontiers
of Science discussions, but seemed used to the sight of so many
scholars coming to their house.
But he wasnāt idle. He appeared to be conducting some kind of
research at home, always deep in thought. Whenever he met any visitor,
he would greet them absentmindedly and then return to his room
upstairs. Most of the day was spent there. One time, Wang glanced
into his room through the half-open door and saw an astonishing
sight: a powerful HP workstation. He was sure of what he saw because
the workstation was the same model as the one he used at the
Research Center: slate-gray chassis, model RX8620, four years
old. It seemed very strange to own a machine costing more than a
million yuan just for personal use. What was Wei Cheng doing with
it all day?
++++
Episode 3 (/30) of the Tencent show has (35:03/43:05):
āThe model is RX8620. The Superconductivity Research Center
has one too. It costs millions.ā It doesnāt mention āHPā
specifically. I suspect that the Netflix show, being considerably
more abridged, doesnāt mention the computer at all (in fact, I
see that the character of Wei Cheng is omitted altogether from
the Netflix version).
Press releases from Nov. 2003 say:
++++
CPU Configuration: The HP Integrity rx8620 Server is a symmetrical
multiprocessing (SMP) server supporting up to 16 high performance
Intel Itanium 2 1.6 GHz 6 MB L3 cache or 1.5 GHz 4 MB L3 cache.
Both servers also support the new and improved sx1000 chip set.
An rx8620 has a starting price about $65,000, with most customers
expected to pay between $175,000 and $200,000.
++++
An eBay listing from a few days ago had:
++++
HP RX8640 AB297A Integrity Itanium Server
32 CPU cores 256GB mem
HP-UX Unix 11i v3
US $11,000 (from Cypress Technology, Inc.)
Condition: Used. Shipping: US $500.00 (from Florida).
++++
;->
Further details (of all places from Wikipedia):
The 17U rx8620 is based on the SX1000 chipset which supports both PA-RISC and Itanium 2 CPUs. The 17U rx8640 is based on the SX2000 chipset which supports both PA-RISC and Itanium 2 CPUs.
The RX8620 was introduced 2003.
Iām gonna make a smart-ass criticism so let me establish minimal ābona fidesā first. During the 1980s I worked for an obscure startup called Culler Scientific Systems. We built a computer, the Culler-7, which the later Intel i860 (mentioned in the article) was ā¦ remarkably similar to, problems included. Then in the 90s, I worked for Sequent (also mentioned in the article) on the periphery of the operating systems group that contributed to Merced.
Now, the criticism: the difficulty with all these VLIW approaches is that when you start with conventional software written in a conventional 3GL like C, there isnāt that much instruction-level parallelism to extract.
And saying this isnāt just 20/20 hindsight. It was known at the time - before the Itanic even started, before Transmeta was founded, back when the i860 was a thing ā¦ it was known: https://eceweb1.rutgers.edu/~yyzhang/fall10/reading/ilp.pdf
The abstract states: Even with impossibly good [ILP detection] techniques, average parallelism rarely exceeds 7, with 5 more common. Google says this paper has 960 cites now. If only the right people had listened thenā¦
Thanks - I probably ought to be familiar with that paper, but for reference, itās
Wall, D. W. (1991). Limits of instruction-level parallelism. Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS-IV. doi:10.1145/106972.106991
As you note, thereās heaps of research in this area. What happened in this imperfect world is that we kept making ever more complex machinery to extract what parallelism we can - modern processors are astonishingly complex compared to the ones in scope here. As ever, such things were not economically or technically possible back then.
I think Iād say that VLIW hoped to push some complexity over to the compiler - as you note, the language used at the front end has an effect on whatās possible at the back end. I suspect our compilers and languages are a lot more complex now, too, hopefully with some good effects.
Iām tempted to say that weāre more able to build reliable complex hardware than reliable complex software, and perhaps thatās one reason why weāve taken the path we have. Itās extremely difficult to build reliable complex hardware, but it is possibleā¦ admitting of course that itās never perfect, and we do have some mis-steps.
Thanks, Ed, thatās a balanced summary.
Itās sort of amusing to note that a lot of things he wrote 30 years ago about āidealizedā or āperfectā computers are actually (or at least ānearlyā) implemented in modern hardware. We do have CPUs with nearly perfect branch predictors, they have 100s of registers they rename willy-nilly, on-chip or ānear chipā caches are the size of 1991 main memories, etc. And modern compilers use a back end technique called āsingle statement assignmentā that probably comes pretty close to being a ātrace scheduling compilerā without bothering to make any such claims. So weāve kind of done all of it, and the CPUs are as fast as they are ā¦ itās just never fast enough. 