So many bit-serial CPUs, ancient and modern (Pilot ACE, LGP, 74 series, homebrew, ...)

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Computers with bit-serial CPUs use fewer resources, so we find them in the earliest machines - they are a good match for serial memory, too, such as delay lines and drums. In some ways they fit well with longer word lengths, as the cost doesn’t scale up with word length - although the effective speed scales down.

Because they use fewer resources, they also pop up in minimalist hobby projects, like this 8 chip 16-bit computer from Jiri Stepanovsky:

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(via hackaday)

Ferranti’s 16-bit F100-L microprocessor is bit-serial on the inside which makes a virtue out of a fast chip clock and relatively slower external memory.

And I gather the COSMAC also has a serial ALU…

It had sixteen 16-bit registers, which could be accessed as thirty-two 8 bit registers, and an accumulator D used for arithmetic and memory access - memory to D, then D to registers, and vice versa, using one 16-bit register as an address. This led to one person describing the 1802 as having 32 bytes of RAM and 65535 I/O ports. It also had early DMA support. A 4-bit control register P selected any one general register as the program counter

Alan Turing’s Pilot ACE was bit-serial - here’s a talk about it, and also about a rebuild, the Tiny ACE, by Jürgen Müller. (Sound quality not great):
Tiny ACE – Exploring Alan Turing’s Automatic Computing Engine

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The Pilot ACE computer was built at the National Physical Laboratory in Teddington from 1946 to 1951, based on a design by Alan Turing. While intended merely as a testbed for a full-scale “Automatic Computing Engine“, it was one of the fastest computers of its time with a 1 MHz bit clock, and was used extensively for calculations e.g. in aerodynamics.

In the talk, I present the unusual, minimalist concept of the Pilot ACE, a bit-serial architecture designed around ultrasonic delay line memory. The machine essentially knew only one operation – a data transfer from a source to a destination address, with dedicated sources and destinations providing arithmetic and logic operations as well as branching. I then describe and demonstrate my “Tiny ACE”, a scaled-down functional model of the Pilot ACE. Built from simple integrated logic circuits and real ultrasonic delay line memory as used in analogue TV sets, it explores the functionality and a bit of the feel of programming the Automatic Computing Engine in 1951.

A similar talk is available in German:

In fact, Jürgen has made a series of nice FPGA remakes of serial machines:

Previously we’ve seen
A Bit Serial CPU in 74HCxx logic

And I happen to know @monsonite is working on one too!

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don’t forget the Datapoint 2200, too

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Ed,

Documentation on the RCA1802 ALU relied on reverse engineering from die shots, taken as part of the visual 6502 project.

The original site is down, but has been archived elsewhere.

Here is the principal link:

There is also some more info here:

The ALU is based on a few gates and multiplexers. I transcribed it to the “Digital” simulator a while back to make it easier to understand.

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Here is the link to the RCA1802 notes that was omitted from the previous post:

https://web.archive.org/web/20160328172101/http://www.visual6502.org/wiki/index.php?title=RCA_1802E

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There also was a 60’s Educational serial computer around, but that uses a real magnetic media.
It was 12 or 8 bits but I seem to have lost the link.

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There was also the Electronics Australia EDUC-8 system that was TTL, bit serial.

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Good one! In fact we’ve had a thread on that:
EDUC-8 - a DIY 8-bit PDP-8/S in Australia from the early 1970s - new repro kit now available

And we shouldn’t forget the PDP-8/S, somewhat unloved due to performance:
The PDP-8/S - an exercise in cost reduction

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And didn’t the SC/MP also use a bit-serial ALU? I guess die size reduction was important to reducing cost in the 1802 and INS8060 (SC/MP) as opposed to discrete transistor count reduction in the PDP-8/S. I find both of these early microprocessor’s ISAs so interesting.

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It’s a good question. Wikipedia says so, but no citation. I think the cycle counts of the instructions does not indicate a serial ALU.

For example, only 6 microcycles to do logic operations on E register.

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Yes, agree. National’s SCMP Technical Description manual also shows a die photo with the ALU taking up a significant amount of real estate. I think people, myself included, assume bit-serial when they see a slow (high number of microcycles) instruction execution.

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The Elliott 803 is also serial, with magnetic core logic and transistors.

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I have previously been looking at the origins of the Ferranti machines, which started with an early liaison with Manchester University in the October of 1948.

But post-war Britain was a hot-bed of technical developments, boosted no doubt by the advances in computing, codebreaking, communications and RADAR, made during WW2.

Both Manchester and Cambridge Universities were actively building experimental machines having both sent delegates to the Moore School of Electrical Engineering summer-school conference of 1946.

Manchester opted for an electrostatic storage technique using modified CRTs, whilst Cambridge were using mercury filled acoustic delay lines. Magnetic drums and tape were a later development for bulk storage.

In the same way that Manchester developed a commercial relationship with Ferranti, Cambridge who were developing the EDSAC, had a similar arrangement with J. Lyons and Co, and the LEO was highly influenced by the EDSAC design.

The Pilot ACE, built at the National Physics Laboratory (NPL) was a cut down version of Turing’s ACE.

It was taken up by English Electric, who commercialised it as the DEUCE.

Other British companies active at this time were Elliott Brothers of Borehamwood, who released their Elliott 152 in 1950, a 20-bit machine that used Williams Tubes for storage and was strongly influenced by the Manchester line of machines.

These four company evolutionary threads continued to supply computers throughout the 1950s and into the transistor era of the 1960s.

One notable exception was the Harwell WITCH, which used Dekatron tubes for decimal counting and volatile storage. It was a one-off built for the computational requirements of the Atomic Energy Research Establishment at Harwell.

Finally, a survey by the US Navy of all digital computers available in 1953. Interesting to see such a variety of technology, wordlengths, speed and valve/relay/diode counts.

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Nice find! Page 7 of the PDF:

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