Meet Raspberry Silicon: Raspberry Pi Pico now on sale at $4

Not RetroComputing, but some people might be interested in this new microcontroller.

Today, we’re launching our first microcontroller-class product: Raspberry Pi Pico. Priced at just $4, it is built on RP2040, a brand-new chip developed right here at Raspberry Pi. Whether you’re looking for a standalone board for deep-embedded development or a companion to your Raspberry Pi computer, or you’re taking your first steps with a microcontroller, this is the board for you.
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We had three principal design goals for RP2040: high performance, particularly for integer workloads; flexible I/O, to allow us to talk to almost any external device; and of course, low cost, to eliminate barriers to entry. We ended up with an incredibly powerful little chip, cramming all this into a 7 × 7 mm QFN-56 package containing just two square millimetres of 40 nm silicon. RP2040 has:

  • Dual-core Arm Cortex-M0+ @ 133MHz
  • 264KB (remember kilobytes?) of on-chip RAM
  • Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus
  • DMA controller
  • Interpolator and integer divider peripherals
  • 30 GPIO pins, 4 of which can be used as analogue inputs
  • 2 × UARTs, 2 × SPI controllers, and 2 × I2C controllers
  • 16 × PWM channels
  • 1 × USB 1.1 controller and PHY, with host and device support
  • 8 × Raspberry Pi Programmable I/O (PIO) state machines
  • USB mass-storage boot mode with UF2 support, for drag-and-drop programming
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Indeed not Retro!

Interesting, but do we want this news here? The Pico news is everywhere on the web …

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Not inherently retro but I think it could be interesting: it joins the Teensy and other devices which are well-suited to run embedded emulations of retro computer systems and chips. I’ve already heard of a 30MHz 6502 emulation running on the Pico… and that this chip is 5V tolerant in practice. It’s a whole lot cheaper than Teensy, too, and with I/O better arranged for bit-banging 8 bit busses. Sorry Teensy, perhaps the future is Pico.

See previously:

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Or even bit-banging DVI.

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Or even a whole BBC Micro (with the Pico “slightly overclocked”) using the Programmable I/O for video output and the USB for keyboard input.

I think the PIO controller might make this interesting for implementing moderately high-speed I/O interfaces for retrocomputing systems. I don’t know enough about the details to be sure, though.

(Similar to the BeagleBone Black in things like the UniBone.)

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Ed,

Not the first Cambridge computing company to invest in custom silicon…

The PIO blocks look like they are the key innovation.

Currently code is only being executed out of Core 0. R Pi annonce that they will address this after they get over the launch.

Unlike previous Pi products, the RP2040 IC is being sold to other manufacturers, including Arduino, Sparkfun, Adafruit and SeeedStudio - and they are actively being encouraged to develop their own boards and variants based on the Pi device.

This is a clever move because it gets the chip out to the volume (hobbyist/educational) manufacturers, and takes advantage of their well established supply chains.

It would make an ideal universal memory and peripheral sub-system for a retro project.

Unfortunately the RP2040 is not 5V tolerant - but if your retro project includes a W65C02S or a CMOS 80C85 3V3 operation is permissable.

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I want 5 V I/O. But the real problem 256KB is only 64K words.
Ben.

It does indeed look like the 264 KB of RAM is a rather firm limit; it doesn’t have an external SRAM or DRAM interface, and the SPI driver does not seem to directly support serial-attached memory regions. It does, however, have a memory protection unit that may be able to support swapping.

Just ordered mine. Looking forward to how many retro emulators will be made with it.

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Just ordered mine from Pimoroni in UK.

My only criticism is that you get stung £2.50 for first class UK postage.

I suppose that these suppliers need to charge for “order handling”.

Pimoroni also have announced their own version - coming soon - much smaller footprint and aimed at wearables.

I too am interested in using this to simulate vintage microprocessors, notably 6502, 8080/Z80 and even earlier the PDP-8.

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I think it’s great that the Raspberry people have made the chip available, so it can appear in various shapes and guises. As noted, it helps with the economics, but hopefully it also helps support a healthy ecosystem with many products and libraries: Raspberry are in an unusually well-funded and popular position, which might threaten the viability of other offerings, and I wouldn’t like that. Teensy, I still love you.

It’s also inevitable that any one chip won’t have everyone’s favourite feature list - it hardly seems worthwhile to me, to lament what a given chip doesn’t have. Other chips have other mixes of features. And it’s very likely that there will be subsequent offerings - Raspberry seem to manage to ship a new product every year, more or less.

It’s also encouraging to hear an insider say that the Zero will continue to be produced. Nothing is certain, but that’s encouraging.

As it turns out, these low-end Cortex cores don’t run the original 32-bit ARM instruction set, so I wouldn’t be totally surprised to see an ARM2 emulation pop up at some point, so we can run BBC Basic on ARM on Pico. For less specialised tastes, microPython will be very popular, I’m sure.

Edit: I see Hackspace magazine has 3 relevant articles online:



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If the Pico (or a similar board at the same price point) had used RISC-V I would have been very interested - the strategy they use for improving the economics would have been just the thing to get RISC-V flying. At this point I’m not really interested in yet another Cortex-M0+ variant.

(AddEdit: As it’s a microcontroller which is not running the Raspbian OS (or any other OS) there isn’t any particular reason to try to stay “compatible” with the other Pi boards, software wise - there’s not anything to share really. And it’s an M0+ so it’s different anyway.)

I agree with Tor. Just another. For example, The ESP32 is more interesting with Bluetooth and wifi and with a lot lower price, capable CPU’s, more GPIO’s much more support.
Many Raspberry Pi enthousiasts of course, so it will sell.
Raspberry Pi Pico - would you bother? - Scargill’s Tech Blog for a more balanced view.

USB 1.1? No Wifi or third party with price increase? Not impressed with deep sleep figures.

I don’t think we’ll have to wait too long for that. There’s already a RISC-V ESP offering.

Edit: we’ll see Raspberry’s silicon expertise ramp up, I’m sure, and with it their ambition. I wouldn’t expect their first chip to be completely groundbreaking: that’s a good way to fail to deliver.

Edit: also noteworthy, if a million people say “not for me” and a million say “yes please” that’s a win! It helps fund the next offering.

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Yes, I’m aware of the ESP32_C3… but they’re not trying the same strategy used for the Pico where they’re actively pushing the silicon to other makers (Adafruit, Arduino, etc). That’s the combination I would have liked to see for the RISC-V.

Whilst the Raspberry Pi foundation have settled on a fairly low risk M0+ ARM core for their first custom silicon offering, this is not to say that they might try something a bit more a adventurous in the future, such as the RISC-V.

They have managed to galvanise an alliance of board developers and distributors around the world, to make sure that the RP2040 product reaches the people in volume.

With Sparkfun and Adafruit on board and creating their own pcbs based on the RP2040, it hopefully means that there will be a greater level of acceptance in North America, than previous R-Pi products.

From this co-operative standpoint, what’s not to say that members of this alliance agree to collectively fund a RISC-V product, either doing their own silicon design or contracting this out to an existing RISC-V vendor.

With mask-sets costing anything from $1 million to $10 million, plus other NRE and fabrication and packaging costs, it would appear sensible to distribute these costs over a wide customer base.

If the first offering the RP2040, gains momentum and proves the usefulness of the PIO devices, then there is no reason why a similar or improved device could not be created around a licence-free RISC-V core.

For those suggesting that the RP2040 is compromised because it has no wireless, I would suggest that majority of the billions of microcontrollers operational today have no wifi or bluetooth.

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It strikes me that there are two very different kinds of conversations possible around this news. One is, whether one would or would not buy this part today, as is, and whether it lacks some feature. The other is, whether or not this is an interesting development: a non-profit foundation with their own silicon design capability, making a chip and selling into various partner programs, and what they might be doing in two or three years time.

I’m sure we’ll see interesting projects with this board, and with other boards using this chip, and also that the next offering, and the one after that, will be very interesting.

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When all this is said - I think Scargill’s blog is missing the point somewhat. The way I understand it is that the PIO of the Pico is pretty advanced and can’t be compared to GPIO at all - it’s more like individually programmable I/O. So it’s not fair to just count pins and compare the numbers. Also, how can it possibly be fair to compare shipping prices with something shipped from China, and use that against the product? We all know what’s going on with shipping from China. I can buy something at 0.99$ and get free shipping. That’s clearly not including the actual cost of shipping.

I actually think they’ve tried some adventurous things even with the M0+. To wit:

  • The dual-core nature is interesting; I am unaware of another dual-core M0 processor. In addition, they’ve done a fair amount of work to make that dual core processor maximally useful:
    • There is a synchronized message queue between the processors, holding 8 32-bit words of data.
    • There are hardware spinlocks for synchronizing processes between the cores.
    • There are extra atomic GPIO registers for easier sharing of the (shared, memory-mapped) I/O peripherals.
    • The memory architecture is designed so that a careful programmer can fully utilize both cores with minimal wait states due to memory contention. There are six (or eight, including the Flash cache!) independent memory channels attached to RAM, and (as I understand it) two independent Flash caches (which can be used as more RAM).
  • The PIO package, as discussed elsewhere here, appears to be quite capable and interesting for implementing (relatively) high speed I/O protocols.
  • It has hardware integer division, both quotient and remainder, and implemented in such a way that it is asynchronous.

I’m not sure exactly what they are targeting with this device (it’s more like a micro:bit than a Pi, really), but I think it is a very interesting device, and I think it does include some true novelties (though maybe not actual innovations). Also, as mentioned elsewhere in this thread, the chip is available to other manufacturers, and of course all of their code is freely licensed (the examples in the documentation are all BSD 3 Clause).

I am excited about this device. I don’t know if I’ll use it, personally, but I think it is very interesting and has the potential to change things — as well as all that it implies, WRT the Pi Foundation now becoming an IP producer for hardware cores.

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