Looking for some topics for new wikipedia articles on processors. I have a few of the oddballs like the 9002 and PPS-8 already, but always looking for more!
The AL1 looks like a good topic, does anyone have good documentation on it?
Any others that are not well known that aren’t up on the wiki yet?
While not a real device, Byte magazine described a 8 bit Forth CPU once. The pin out looked a lot
like a 6502.It was some thing like if Bit #1 of the opcode was 0, it was a forth subroutine call,(two bytes total).If it was a 1
you decoded a forth primitive.
There are a bunch of little known Forth-oriented stack machines, some of which were built. Here’s another one (note: PDF) that didn’t make Koopman’s book. (Edit: the Novix 4016 is particularly interesting if you don’t plan to read Koopman’s entire book.)
A fantastic snapshot of the microprocessor world in 1977 can be found in the PDF of the October 11 1977 issue of Electronic Design magazine. From page 82 (88 in the PDF) to page 190 (206 in the PDF) you have a one page explanation for each processor (with lots of ads between these “datasheets”). A bit before that there are some tables comparing the different processors.
There is also such a table in the November 22 1975 issue of Electronic Design (page 40, 46 in the PDF) but it doesn’t list the TI processor that is advertised in the same issue, and it lists the 6502 and 6800 as 16 bit processors.
Since the AL1 was only used internally by Four Phase I don’t think there is more public information than what was in the April 1970 issue of Computer Design magazine. I haven’t seen that issue online, but only for sale for around $90. I haven’t checked the Four Phase documents at Bitsavers.
Although I’m almost completely certain that it never made it to silicon, the Gould/AMI S-83 Z80 with Personal CP/M in mask ROM still exists in my heart.
This is why I should never be let near Wikipedia’s edit button.
Agree, Jecel’s Electronic Design reference got me down a rabbit hole. I figure if you want to research an interesting processor to add to Wikipedia the Burroughs Mini-D is very interesting; a 16-pin serial 8-bit unit described in this bitsavers doc here: Burroughs_Microprocessor_Machine_Image_Generator_MIG_Users_Manual_197211.pdf.
I should have mentioned that I was already familiar with many of the microprocessors in that magazine issue thanks to “Great Microprocessors or the Past and Present” by John Bayko.
While I mentioned the 1975 and 1977 tables, I am pretty sure this was an annual feature in Electronic Design (probably around the end of October) so later issues would include microprocessors that came out after 1977. On the other hand, they would not include processors that were no longer being made by that time.
One source of confusion about the AL1 chip is that it is often called a “bit slice” since it was 8 bits wide and Four Phase used three of them in their 24 bit computer product. They claimed that Lee Boysel cheated in his courtroom demo that hooked up a single AL1 to ROM and RAM plus an UART and played a game on a terminal. They say they can do the same thing with a AMD 2901 and a TTL counter. But, unless I misunderstood, the AL1 includes a program counter and implements control instructions. So it is a “computer slice” and not a “datapath slice” which is what people think of when they talk about 'bit slice".
Having created my own design which is an expandable “8 bit computer slice” I feel this subtle difference can have an important impact.
The program counter really depends on the architecture where it is placed, not what IC it is in,
The PDP-5 had it in main memory, I like it as GP register.
The 4 phase computer, was designed as system so the AL 1 chip could have more support logic
than a normal bit slice, like a MAR and MBR, but I have no info on the chip, Computers then
had only one size for data so one does not need to fiddle with signed,unsigned bytes and ints like today,.The memory unit would pack/unpack byte data if one had it.
I use a 9 bit slice (CPLD+RAM) in my 18 bit cpu and need deal with byte sized and constant data inputs. Doing this in TTL is possible with a 74181 alu and 16x4 ram is simple but just messy.(ball park figures, 10 chips per 4 bit slice + 10 glue ~ 60 chips)
Support chips take up more space than you think, as well as having byte data,I found out.
The Four Phase computer is really impressive for what you got, 24 bits in the same space
as 16 bits,
The 4-Phase clocking is also notable, it allowed the use of minimum size transistors for most gates.
I don’t know enough about logic design to understand this statement, but it seems important. Am I correct in thinking that the two clock pins was used to implement the same on things like the 6502? Or is that different?
It’s not a complete answer, but internally the 6502 uses two phase non-overlapping clocks. I think we can call that two phase, but it does have four regimes in sequence: phi1, none, phi2, none. Just possibly that counts for something!
(The 6502 has only a single clock input, but two clock outputs. One of its tactical advantages over the 6800 was not needing an external clock driver chip. The 6800 did have two clock inputs, for the two non-overlapping phases.)
The Wikipedia article explains four phase logic very well. Some processors, like the TMS9900, have four clock pins but those are four non overlapping clocks and so don’t match the “four phase” style.
Latches use up fewer transistors than clock edge triggered flip-flops and so were very popular in the 1970s and 1980s. The problem is that any changes in the input are reflected in the output when the latch is “transparent”. So if you connect a series of latches any new data will flow through all of them. The solution is to enable all the even latches while the odd latches hold their data, and later enable all the odd latches while the even latches are holding their data. This can be done with two separate clocks, and they should not overlap because that would enable all latches at once and we would be back to the original problem.
Many early processors which only had a single clock pin actually generated two clock phases internally, though the 6502 was one of the few that exported those internal clocks.
Eventually it became harder and harder to route two separate clocks all around the chip such that at no point did they ever overlap. And transistor counts had gone way up, so designs moved to a single clock with edge triggered flip-flops.
Back to the four-phase logic, its main advantage over static NMOS or PMOS is that it didn’t need loads (with it relatively larger transistors) constantly draining power. And the extra complexity of routing four clock lines was compensated by not needing to route Vdd and ground (this was the era of a single metal layer). CMOS exchanged the complexity of the four clock for the complexity of complementary NMOS and PMOS circuits, but it also allowed static designs.
Regarding the 6502, the 6501 still required an external clock generator (with dedicated inputs for Φ1 and Φ2). With most of the remaining circuitry being the same in the 6502, this should mean that this is not a “vital” feature, but more of a convenience.
Ah yes, of course - because this was the model intended to be a socket-compatible replacement for the 6800. The one which was cancelled after the lawsuit, and which was later claimed to be a sacrificial design (although I don’t believe that.)
I got the feeling that memory worked the same way with a 4 phase clock. The memory chip may have been a better design than the other chips of the time.
There’s also this article from Ken Shirriff. If you read down the article, he has a long section called Is the TMX 1795 really the first microprocessor? in which he goes through his rationale for deciding what to include and what not to. His reasoning is fascinating in its own right, especially when it comes to Boysel and Four-Phase.