@gdevic offers us a ten-part blog post series, a calculator built using the kinds of techniques found in an HP calculator of the 70s, but in FPGA, with a custom BCD-oriented CPU.
How does a scientific calculator actually work? Not in the hand-waving sense of “it has a chip and some buttons,” but all the way down. How does it store numbers? What algorithm computes sin(x)? How its very simple CPU operates?
This series documents getting those answers: the final product being a fully working scientific calculator designed and built from scratch, with a custom CPU created in an FPGA, hand-written microcode, C++ reference implementations providing golden reference values, and the physical hardware that sits on my desk and can calculate precise answers. It is all open source: you can see it; you can try it.
From the first post in the series, a photo of a physical build:
Thanks Ed for posting!
Frankly, the hardest part was trying to engineer the keypad. I’ve tried so many variations of pushbuttons, dome switches, etc. and nothing came even close to the HP feel. Unfortunately, that was not a surprise.
As for the functionality, I am not aware of any other FPGA-based, without an off-the-shelf CPU (Nios/MicroBlaze) implementing that degree of functions. If anyone knows, please post a link so I can add it.
If you decide to try running the WebAssembly version, be patient to wait for results since it does a lot on the back end (it wraps the “verilated” Verilog files and runs the microcode).
I did find one project not entirely dissimilar to yours - Zoltan Pekic’s TMS0800 calculator on FPGA (short video here) which uses original microcode to act as TI’s Datamath or Sinclair’s Scientific. Archived Hackaday pages here.
I’ve two questions about your implementation: you use lookup tables for multiplication where presumably HP’s originals use some BCD variation on shift-and-add? And secondly, there’s an abacus method for square roots which is probably more fitting here than Newton’s method, and maybe that’s interesting… (hat-tip to @hoglet for finding that PDF.) It’s again a shift-compare-subtract, so perhaps falls in the category of pseudodivision, and I’d imagine most calculators would use it, or something like it.
I’ve seen the double-PCB method, but not the stickers (Katja’s way) - it looks really good - thanks for the find, I will try that next!
HP calculators used repeated addition, with shift, to multiply (Instruction set, HP35/assembly).
I thought of doing the same but then decided to use a lookup (4x4 bits into a 256 entry sparse table) mainly because I did not know how much slowdown this fundamental operation would cause when looped. I suppose I could swap it now and check.
William Egbert, who wrote HP algorithms, explained some of them in HP Journal. He really optimized for the architecture; in the end, I believe, he only used (+,-,shift) to get the sqrt. Amazing work.
TI calculators seem to have used sqrt(x) = exp(0.5 × ln(x)), which used CORDIC.
I considered both digit-by-digit and NR. The former was more complicated to transcode to microcode, which became an important factor given that I had to hand-write cpu assembly code (and then debug it).
Not sure if it qualifies, but my implementation of 2 classic TI chip calculators used the keypad already integrated in the FPGA development board (or attached external to PMOD). I had to do mapping from board matrix to one expected by the TMS calculator chip but it kinda worked.