EDSAC 2, a microprogrammed bit slice machine from 1958

Here’s a photo labelled “user queue” which shows the users queuing for access to EDSAC 2:

From Cambridge Computer Lab celebrates 75th anniversary

The photo can also be seen here on the Computer Lab website.

There’s an 8 page paper from 1992 by Wilkes himself giving details on the design and the constraints. Here’s the abstract:

EDSAC 2, which came into operation early in 1958, was designed by the team that had successfully built and operated EDSAC 1, and embodied the experience obtained with that machine. EDSAC 2 was the first computer to have a microprogrammed control unit, and it established beyond doubt the viability of microprogramming as a basis for computer design - this in spite of the fact that vacuum tubes were far from ideal for the purpose. At the mechanical level of organization, EDSAC 2 was packaged in a bit-sliced manner, with interchangeable plug-in units. This method of packaging was well matched to the vacuum tube technology of the period, and its expected advantages - arising from the replication of units - were fully realized. The article gives a description of the principal hardware features of EDSAC 2.

The paper itself can be found here, and contains some great material:

(quoting himself speaking in 1951) “I think that most people will agree that the first consideration for a designer, at the present time, is how he is to achieve the maximum degree of reliability in his machine.” I went on to say that, among other things, the reliability of a machine will depend on the amount of equipment it contains, its complexity, and the degree of repetition of units. This led me to advocate a parallel arithmetic unit organized on what later came to be called the bit-sliced principle.

The attention of IBM was drawn to EDSAC 2 by W.S.Elliott, then head of IBM’s Hursley Laboratory, and as a result of this contact, IBM decided to make microprogramming an essential element in their System/360 implementation. My office diary records that on October 2, 1961, Cuthbert Hurd, vice president of IBM, visited the laboratory. Hurd did not disclose the object of his visit, but he has since told me that it was an important factor in leading IBM to take their decision.

…the microprogram had been written on the assumption that EDSAC2 would run at the same clock speed as EDSAC 1½, in spite of the fact that it had a very much larger microprogram matrix. In fact, the microprogram ran more slowly, with the result that some of the nonfunctional microinstructions, which had been included in the microprogram for the sole purpose of giving the adder time to settle down, could be removed.

The voltage induced in a wire which threaded a half-switched core — that is, a core on the same row or column as a selected core—was small but not zero. As a result, there was a danger that the voltage induced in a gate wire which did not thread the switched core, but which threaded a number of half-switched cores, would be sufficient to cause spurious operation of the gate or gates to which the wire was connected. Advantage was taken of the fact that micro-operations could be allocated to individual cores in an arbitrary fashion to reduce this danger. It was laid down that a gate wire should never need to be threaded through more than four cores situated on any one row or any one column of the matrix. The total number of contributions from half-switched cores was therefore limited to eight. The allocation of microinstructions to cores in such a way as to meet this requirement was done by means of a program run on EDSAC1. This must have been one of the earliest examples of design automation in which one computer is used to assist with the design of another in nontrivial way. More straightforward was the use of EDSAC1 to generate the wiring schedules for EDSAC 2.

via


and via a comment on the PDP-8 having a bitslice implementation, over on anycpu.

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I see there’s a 1953 paper by Wilkes and Stringer about microprogramming, referring back to 1951:

This paper describes a method of designing the control circuits of a machine which is wholly logical and which enables alterations or additions to the order code to be made without ad hoc alterations to the circuits. An outline of this method was given by one of us (M. V. W.) at the Conference (l) on Automatic Calculating Machines at the University of Manchester in July 1951.

  • Wilkes, M. V., & Stringer, J. B. (1953). Micro-programming and the design of the control circuits in an electronic digital computer. Mathematical Proceedings of the Cambridge Philosophical Society, 49(02), 230. doi:10.1017/s0305004100028322

It’s cited by Hennessy and Patterson in their talk earlier this year “A New Golden Age for Computer Architecture” - (video within):

The table here lists four models of the new System/360 ISA IBM announced April 7, 1964. The data paths vary by a factor of 8, memory capacity by a factor of 16, clock rate by nearly 4, performance by 50, and cost by nearly 6. The most expensive computers had the widest control stores because more complicated data paths used more control lines. The least-costly computers had narrower control stores due to simpler hardware but needed more microinstructions since they took more clock cycles to execute a System/360 instruction.

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