A fun one is the MTU-130 and its “Datamover” memory expansion. Fun, because the MTU-130 was a (quite capable) 6502 system and used a full-fledged Motorola 68000 as an auxiliary processor (avaoiding conflicted words) in the Datamover for shuffling data, DMA, but also for executing tasks under the control of 6502:
The Datamover-256 is an advanced high speed microprocessor/memory expansion for the MTU-130 desktop computer. In use it provides the MTU-130 user with 256K additional bytes of memory, all fully accessible by the MTU-130’s 6502 processor. It also provides a slave processor function using the Motorola MC68000 16 bit microprocessor which is currently the most powerful microprocessor in general use. The 68000 can directly access the 256K of memory as well. Together these Datamover features allow the MTU-130 user to tackle applications heretofore impossible or impractical to do on a low cost desktop system.
Hi, since the PD32 design contains two separate computer interfaces (ISA and the parallel port) I am thinking to update the PD32 KiCAD files and see if it is practical to convert to a duodyne board.
It may be that we really don’t need the ISA connector and the PD32 could be repurposed as a duodyne NS32016 second processor. That would be cool. The ISA connector would only be useful in the context of an ISA type computer (PC/XT or PC/AT type computer).
Does add-on accelerator qualify as dual CPU? Assuming it does, there is an accelerator for Apple II , among many others, called Ultrawarp. I mentioned this specific accelerator because I’ve upgraded it from 65816+RAM+44 TTL to 65816+RAM+CPLD+1 TTL. Also made it faster in the process, up to 20Mhz. Unfortunately I don’t own the design of Ultrawarp, so the conversion to CPLD is not for public dissemination. I have a page here. https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:apple2:ultrawarp2:rev1:uw2r1
Interesting info about Ultrawarp, and the interface and your plans… but for me, dual cpu would have to mean some way of running both in parallel, at least some of the time. If they are running in an either-or relationship, for me it’s not quite the same, although it is a thing.
One obvious mainstream example was the Amiga Bridgeboard so you could run PC stuff on your Amiga as well as proper software.
There are some weird ones too. We had some weird little 68000 System III unixes boxes that had a Z80 for an I/O processor and could actually run a termnal app on the 68000 and use the Z80 for CP/M.
S100 bus had provision for CPU switching and could also handle standalone systems on cards in the slots. There were CP/M / MP/M not quite clones that actually knew how to do things like run the right kind of binary on the right CPU.
On the NS32K I have an RCbus NS32K board waiting testing. I just haven’t had time to get past the assembly stage, blow some test roms and debug it. It’s using one of the later embedded devices as that cuts the chip count dramatically. The software stack in theory is done-ish as I’ve had an emulator of the system working for ages.
An early and unlikely dual-6502 system is the MDT 650 development system: one 6502 to run the show and the other to act as the target, with some kind of support for in-circuit investigation.
A dual Z-80 CPU machine I used to service in my youth was the Superbrain, which ran CP/M and also did the “main CPU does the heavy lifting while the other CPU faffs with the I/O” shtick. I think we had a customer that was doing things on the second processor, but from memory (no pun intended) the second processor didn’t have full access to main memory, so was limited in what it could do.
A rather unlikely candidate may be found in the TI Silent 700 teletypes, Model 763 and Model 765, from 1977. These featured both an Intel 8080, which handled the communication tasks, and a TMS 9980 (much like the TMS 9900 found in the TI 99, but with lesser bus capacity), which came with its own peripheral chipset and handled keyboard, remote typing, printer, etc (acting as a terminal inside the terminal).
More on this can be found in this rather intriguing blog post:
I was fiddling with my LC040 and realised there is another one not mentioned - the Apple II card for the LC Macintoshes.
I have also been disappearing down the Ohio Scientific rathole for a project so I can add some more.
OSI Challenger 3 (model 510 mainboard). Switchable Z80/6800/6502 system - including software switching processors. Only one CPU at a time but you can happily bounce from the 6502 monitor into CP/M (in fact the Lifeboat CP/M boot appears to start in 6502) or off to 6800 land.
The III is interesting in that it genuinely has multiple ecosystems. Whilst not really much 6800 it supported the full OSI 6502 OS stack and it supported a fairly full Z80 CP/M. CP/M is slightly odd internally as the machine has RAM 0000-BFFF and D000-EFFF but I/O C000-CFFF (classic 6502 mess). Lifeboat managed to put CP/M, BIOS and disk buffers at D000-EFFF and just enough below C000 to makeit appear to applications thgere is no hole. It’s also one of the earliest “K is 1000” systems I’ve seen as Lifeboat CP/M 2.0 reports “49K” 8)
The 510 is really clever as a concept. It holds two processors in reset and uses a PIA and some oneshots so that you can trigger a CPU change which causes the running CPU to enter reset and the new CPU to exit it. By putting the code you need so it is executed from reset you can pass stuff back and forth. For the Z80 it’s easy as the machine has RAM at 0. For the 65xx/68xx there is another PIA bit that remaps FFxx as RAM so you can insert your own vectors before transfers.