An SPI solution for classic microprocessors

I have also posted this on the forum at

SPI is almost universal these days, for peripherals, LCDs, sensors, memory, uSD cards, GPIO expanders etc, etc. It’s also a really neat way to communicate between 2 systems.

The downside is that it is not implemented on the classic cpus - such as 6502, Z80 etc, creating an additional problem to interface these processors to modern peripherals.

Ideally, the solution would be a simple SPI transceiver that could be connected to a traditional 8-bit bus.

A partial solution was suggested on the forum nearly a year ago involving bit-banging SPI, and then a faster hardware proposal making use of the 74HC299 universal shift register.

The desire is to create an SPI Master which can connect to the 8-bit bus.

Write a byte to it, with A0 low to send to the peripheral, and then read back from it with A1 high - that would be perfect. Further logic would be needed to set up a group of slave-select signals. suggested a solution using the 74HC299, but this would require additional logic to create a gated burst of 8 clock pulses to accompany the MOSI data. After the 8 clocks, the SPI clock returns to an idle state.

Could this be done with a single chip solution?

Perhaps an ATmega328p or some other 5V tolerant microcontroller ?

Possibly just a 74HC299 and a 4-bit counter to gate the clock burst?

Any suggestions appreciated.

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Two ports for SDC cards and third port for other devices.
2 SDC cards and RTC would make usefull start.
A small GAL might be best for state decoding,
SDC cards cannot be daisy chained on the SPI bus as far as
I can tell thus you need a port for device.

Micro controlers are cheap, so no reason not have 1 for each SPI port, and have SDC cards more like a floppy or hard disk interface.

There’s a CPLD-based solution called 65SPI:; does that fit the bill?

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