A double retro day: C64 investigated, Archimedes A305 resurrected

I did two things yesterday - visited @hoglet with an untested C64, and visited @Revaldinho with a no-longer-working Acorn Archimedes A305. Read on!

In 2016 I bought a couple of untested and filthy computers from a junk shop, never since did anything with them, so took this C64 around to @hoglet yesterday to investigate:

We thought it might be interesting to see how its video output looks, for HDMI dongle project purposes. But as it turns out, it powered up with a blank screen, so we ended up investigating the 6510’s pins to see what signals were doing what. Eventually, with the logic analyser, and referring to The Ultimate Disassembly, we saw that the boot vector was supplying two unexpected byte values and then the code jumped into the Basic ROM instead of the Kernal ROM. And then saw that the PLA (actually a large ROM) was failing to select the right ROM, and it turns out that this component often enough fails.

There are various projects which reimplement the ROM, some using only a 9536 CPLD on a small DIP carrier, so that’s an option - either to buy or to build. The only socketed chip here is the SID, so we’d probably remove the PLA destructively. But resurrecting this machine doesn’t appeal to much at present as a retro project, so it must go back into a storage crate.

(It turns out there’s a C64 diagnostic guide with screenshots which might have helped us.)

Dave kindly soldered in the four jump wires to my HDMI dongle board, so now the Pi can reprogram the CPLD - this seems like a very handy technology.

I then decamped to visit @Revaldinho, and handed over his A305 with busted PSU. It was gifted to me years ago and only once did I have a play with it. More recently when I powered it up the PSU let out the smoke.

We hooked up R’s bench supply, and a monitor which accepts composite, and then a second monitor, and fiddled around quite a bit before getting the right combination: not only the right monitor, with the right input selected, but also with a replacement 3V battery pack. And then power-up with DELETE held down.

The floppy drive didn’t work, nor the speaker, surely because we only had a two rail supply.

But we were able to run Basic, as a task in a window or full screen, or from the CLI bypassing the GUI. So we typed in SPHERE aka WOOLBAL and got a world record 0.74 seconds. And we noted that the machine must have been upgraded as it has 1MByte of RAM. We also typed in a couple of very short assembly programs, finding that a 2^20 decrement took 0.97 seconds. Some photos of the machine and the session:

We referred to a handy book - I think the Mike Ginns book - for tips on using the ARM assembler built into BBC Basic.

R notes that the Gotek might be just the thing for this machine, as it only needs 5V. It’s a bit tedious using a machine with no storage! But the machine has a serial port, so that’s is another way to load and save data.

Next step with this machine perhaps is to borrow or procure a riser so it can take a podule: there’s work in progress on an ARM version of R’s CPLink project, a simple board which allows a Pi to serve data to a retro host.

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Here’s a link to that review of the Archimedes from PCW August 1987:
http://chrisacorns.computinghistory.org.uk/docs/Mags/PCW/PCW_Aug87_Archimedes.pdf

Dave

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Nice find! Lots of detail in there. I see they review the in-house-only predecessor, the A500, so we might see the A305 is a bit faster, if we can re-benchmark it. And we learn that the A305 would have cost £800 plus tax.

I’m intrigued by the RAM story. Looks to me like the A305 was sold populated with just 8 chips, so they must have been nibble-wide like the Electron. We’re told they are clocked at 8MHz but I think that will only be for sequential accesses. I’d be interested to know if they are -12 parts, or what. In fact half a megabit per chip is an unusual density so I wonder if I’ve gained or lost a factor of two somewhere.

I don’t know what the story is with video bandwidth and cycle stealing, although I think there is such a story. Possibly minimal speed impact in the TV compatible mode we’re in.

I think you might have mis-counted…

The A305 and A310 share the same motherboard. The A305 is supplied with 16x 4464 DRAMs, and has 16 empty sockets, which comes to 512KB. The A310 is supplied with a full complement of 32x 4464 DRAMs, which comes to 1024KB.

An 512KB upgrade kit was available from Acorn containing 16x 4464 (120ns) chips. The Acorn part number for the chip is 0704,105. This is also used in the Master.

There is a schematic of the memory system here:
https://acorn.huininga.nl/pub/docs/circuit%20diagrams/Acorn/Archimedes%20300/

(See Sheet1-PART1)

The memory data bus is 32-bits wide, and I believe fast page mode is used when sequential words are accessed.

Edit: Service Manual is here:
http://chrisacorns.computinghistory.org.uk/docs/Acorn/Manuals/Acorn_A300_SM.pdf

Dave

Excellent, thanks. I confused 8 and 16 - they are so similar! Interesting, then, that the minimum of 16 RAM chips still supplies 64 bits, so there’s a mux in there for the ARM, and with the possibility of video fetches being twice as wide (and therefore half as expensive in time.) (Edit: although the diagram doesn’t really leave room for this possibility.)

Some benchmark results for the A300 in this brochure - indeed it’s a little faster than the A500 seen by PCW.

More on the A500 here and links within. Indeed it seems the VIDC reads 4 words at a time using fast page mode, and the DRAMs are probably -12 speed, although some A500s had -10, and some were overclocked from 8MHz to 12 or even 14MHz.

Both the sound and video DMA circuits have small internal buffers so they can read 4 words at a time, which reduces the memory bandwidth stolen from the processor. But depending on the graphics mode chosen it can still slow down computation quite a bit.

The memory is 4MHz (16MB/s) for random access and 8MHz (32MB/s) for page mode, which is used for sound, video and when the processor executes a sequence of instructions which only use the registers (a very common thing on a RISC).

The -12 speed rating for the DRAM means 120ns from the start of the /RAS signal to the data coming out of the chip. The total time for a full cycle is more than that (230ns in this case), so the memory can be used at most at 1000/230 = 4.35MHz for random addresses.

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