This animated simulation might help someone somewhere understand about the 6502 and its instruction set. It purports to show internal operation of the 6502, but it’s from 1982, and we now know rather more about how things work internally. It’s nicely animated in Apple II high resolution graphics. I don’t suppose it’s cycle-accurate but it shows memory traffic byte by byte as well as internal register transfers and operations.
The original (upstream) disk image is called
- MECC-T691 Apple Assembly Language v1.0.dsk
and can be downloaded from this collection of MECC disk images. (MECC is the Minnesota Educational Computing Consortium.)
The Internet Archive has a bad rip, probably not useful or usable, here.
There’s also a version of the program here.
(also posted on 6502 forums)
I’m reminded of the Apple ][ emulator that appeared in the June 1983 issue of 80 Microcomputing.
It’s not actually a full emulator more just a 6502 interpreter written in Z-80 code. Still, an unusual notion for the time.
That’s an interesting thing - I think it’s a different kind of thing, but still interesting. From the article (Apple Core Emulator by Gary Grout):
I call my 6502 emulator the Apple Core Emulator. Not only can it run Apple-compatible programs, it creates them as well. The emulator converts Assembly-language code for the TRS-80 Z80 microprocessor into 6502 machine code.
The 6502 register structure and its ad- dressing modes are quite different from those of the Z80. The Z80 has 14 registers, eight of which make up a rarely used alternate register set. The emulator uses this alternate register set to keep track of 6502 code.
The 6502 has only three 8-bit registers, a stack pointer, program counter, and flag register. The working registers are named A, X, and Y. The program counter is referred to as PC, the stack as S, and the flag register as P (for phlag).
(I found that last bit amusing!)